JOB DESCRIPTION:
-Implement DFT related designs including scan, JTAG, MBIST and Analog Macro test.
-Develop and enhance DFT flow.
-Work with design team for DFT integration.
-Generate DFT related timing constraints and work with backend team to close DFT timing and power.
-Work with test engineering team in patterns handoff and silicon bring up.
QUALIFICATIONS:
-BSEE/MSEE with 5+ years of industry experience in DFT.
-Good understanding of scan/ATPG, JTAG, MBIST, boundary scan and other DFT techniques
-Proficient with scripting, such as TCL, Python and Perl.
-Good understanding of DFT timing and power.
-Self-driven, good team work spirit and good communication skills.
职位描述
企业介绍
云计算芯片公司,主要产品DDR
职位信息
所属部门:研发
汇报对象:经理
发布日期:2020年7月29日 上午10:44:02
语言要求:语言能力不限
年龄要求:不限
行业领域:芯片/集成电路